1. Technical Field
The present invention relates generally to the field of integrated circuit package verification, and more specifically, to a method, system, and computer program product for verifying a full integrated circuit package by efficiently determining the voltage drop across the entire integrated circuit package for multiple different kinds of packages.
2. Description of Related Art
Integrated circuits are coupled to a substrate utilizing an integrated circuit package. The package is responsible for supplying power to the integrated circuit, and physically supplying the circuit's signals out of the chip to the substrate. In order to accomplish this, the package may be very complex. For example, it is not unusual to have 24 or more levels of wiring within the package.
The package itself can affect the performance of the integrated circuit to which it is coupled particularly as power supply currents, power densities, and operating frequencies increase. The effect a package has on the performance of an integrated circuit needs to be measured. This measurement process is further complicated because many systems utilize ASICs which use a large number of custom integrated circuit packages which require fast and comprehensive analysis framework. Hardware failures, due to an inadequate package power grid, have not been detected by previous package verification approaches.
The difficulties with verifying packages apply to both ceramic and organic packages. To complicate package verification further, organic packages present more difficult challenges. The planes in the power and ground layers tend to be irregularly shaped in organic packages. Organic packages are often preferred for ASIC integrated circuits. Because more and more ASIC integrated circuits are being used, there is a need to efficiently and accurately verify large numbers of organic packages.
The current prior art is inadequate for verifying ceramic or organic packages. Ceramic packages tend to have mesh planes. Current verification techniques for verifying ceramic packages do not verify the entire package as a single unit. The current techniques verify only a portion of the ceramic package at a time. The results of verifying only a portion of a package at a time can be misleading. The current techniques for verifying organic packages require manual gridding of the planes in each layer because the layers are made up of irregular shapes. Manual gridding is inefficient and error-prone. Further, it is inefficient to require one framework for verifying ceramic packages and a different framework for verifying organic packages.
Therefore, a need exists for a method, system, and computer program product for verifying a full integrated circuit package by efficiently determining the voltage drop across the entire integrated circuit package using the same framework for multiple different kinds of packages.